At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
Kandou’s architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future.
Job Title: Analog Design Engineer (Advanced Research and Development Department)
Job Location: Switzerland
Key responsibilities
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Develop block level specifications and models for target designs
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Develop, model, design, and verify performance of custom analog circuits in advanced technology nodes
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Layout design and development, including floor-planning, guiding layout engineers, and post-layout verification
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Design verification at different levels (pre- and post-layout, variation-aware)
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Support and collaborate with the design team, including other design and layout engineers, architects and chip level integration engineers, modeling and system level designers.
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Support for post-silicon lab bring-up, debug, characterization and productization.
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Produce reports (progress report, analysis, design, modeling, and verification reports)
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Participate in developing concept level architectures and circuits
Skills
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Deep understanding on design and layout techniques for high-speed and high-precision circuits, problem solver, and excellent analytical skills.
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Experience in developing testbenches and simulation setups to analyze performance of target circuits and systems.
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Skillful in layout techniques, such as matching, parasitic estimation and reduction, and deep-submicron related issues.
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Advanced user of EDA tool for design and verification, preferably Cadence Virtuoso, Spectre/HSpice, Calibre/PVS DRC/LVS, parasitic extraction and modelling, EM and IR drop tools, and ESD analysis, among others.
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Self-motivated, with strong sense of ownership and responsibility.
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Manage workload, schedules and report to internal management and technical teams.
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Excellent communication and reporting skills.
Experience
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5+ years of experience in design and layout of analog and mixed-signal circuits, especially high-speed and high-precision circuits. Examples are: multi-gigabit serial data-link transceivers, RF circuits, equalizers, clock generators, PLLs, clock and data recovery circuits, data converters (ADC or DAC), biasing and bandgap circuits.
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MSc or PhD in electronics/electrical engineering (equivalent or higher).
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Experienced with modern semiconductor process technologies, such as CMOS 28nm, and FinFET 16/14nm, 7nm.
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Experienced in high-level modelling, top-level simulations, and signal integrity.
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Solid background on Signal Processing and Communications
If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It !
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